| 000 | 00601 a2200241 4500 | ||
|---|---|---|---|
| 003 | BDDhADUST | ||
| 005 | 20250901130200.0 | ||
| 008 | 250831s2003 xx |||| 00| 0|eng|d | ||
| 040 |
_aBDDhADUST _bBDDhADUST _cBDDhADUST |
||
| 041 | _aeng | ||
| 082 |
_a006 _bYAI _222 |
||
| 100 | _aSudhakar Yalamanchili | ||
| 245 |
_aIntroductory VHDL : _b From Simulation to Synthesis / |
||
| 250 | _a2003 | ||
| 260 |
_bPearson Education _c2003 |
||
| 300 | _aXix+401 | ||
| 340 | _aPAPER | ||
| 365 |
_b354 _cBDT |
||
| 366 | _eLocal | ||
| 526 | _aComputer Science | ||
| 650 | _aComputer Science | ||
| 942 |
_2DDC _cBK |
||
| 999 |
_c31524 _d31524 |
||